Semiconductors are widely used in integrated circuits for electronic devices such as computers and televisions. These integrated circuits typically combine many transistors on a single crystal silicon chip to perform complex functions and store data. Semiconductor and electronics manufacturers, as well as end users, desire integrated circuits that can accomplish more functions in less time in a smaller package while consuming less power.
Most semiconductor memories use an array of tiny capacitors to store data. One approach to expanding the capacity of a memory chip is to shrink the area of each capacitor. However, everything else being equal, a smaller area capacitor stores less charge, thereby making it more difficult to integrate into a useful memory device. One approach to shrinking the capacitor area is to change to a storage dielectric material with a higher permittivity. Silicon nitride is one material that has a higher permittivity than the most conventional dielectric, silicon dioxide.
In another, related area, one concern is the thickness of the gate dielectric used in conventional CMOS circuits. The current drive in a CMOS transistor is directly proportional to the gate capacitance. Since capacitance scales inversely with thickness, higher current drive requires continual reductions in thickness for conventional dielectrics. Present technology uses SiO.sub.2 based films with thicknesses near 5 nm. However projections suggest the need for 2 nm films for future small geometry devices. SiO.sub.2 gate dielectrics in this thickness regime pose considerable challenges from a manufacturing perspective. In general, the increase in capacitance density (C/A) required for increasing current drive can be accomplished either by decreasing the dielectric thickness t or by increasing the dielectric permittivity .di-elect cons. of the material. Thus, as with storage dielectrics, it is again desirable to change to a material with a higher permittivity, such as silicon nitride. Due to its permittivity, a 3.6 nm silicon nitride film can provide the same capacitance density as a 2 nm SiO.sub.2 film, while a 9 nm nitride film provides an equivalent oxide thickness of about 5 nm.
Another reason for using silicon nitride as a gate dielectric is its effectiveness as a diffusion barrier for boron and other dopant species. This barrier property allows a silicon nitride gate dielectric to limit dopant depletion from polysilicon gates.
Integrated circuit manufacturers have used chemically vapor deposited (CVD) silicon nitride as oxidation and diffusion masks for years. However, CVD (or deposited) silicon nitride typically does not have good enough electrical properties, such as breakdown voltage, for use as a gate or memory dielectric.
An alternate approach for forming silicon nitride is direct nitridation of a silicon surface. This process forms a compound often referred to as thermally grown or thermal silicon nitride. In general, thermal silicon nitrides often have electrical properties that are better than typical deposited nitrides. This difference is especially significant, when comparing nitrides formed with repeatable processes used in high volume production.
Until now, the processes for forming silicon nitride have not been suitable for forming thick, thermally grown, silicon nitride layers in production micron and submicron circuits. U.S. Pat. No. 4,277,320 to Beguwala, et al. describes some shortcomings of using earlier silicon nitride methods to form gate dielectrics. However, the '320 patent describes a method that uses a 975 degree C substrate to form a thermal silicon nitride.